Anonymised screening report · excerptRefFPGA searches, Zynq and video
- Position
- Senior FPGA / SoC engineer, AMD Zynq, video processing
- Location
- Kyiv, Ukraine
- Qualifications
- 10+ years of FPGA design across specialised hardware projects. Current work is digital backend IC design for motor-control devices: clock-tree synthesis, timing closure and logic-equivalence checking. The most relevant FPGA programme was a multifunction chip-test system for the factory floor, measuring voltage, current, timing, data transfer and protocol behaviour. Used Xilinx and AMD Zynq with Vivado on that project, with additional experience in Vitis and HLS.
- Tooling and bench
- AMD Zynq, Xilinx, Vivado, Vitis, HLS and VHDL. Keeps the Xilinx toolchain current through regular hands-on laboratory teaching alongside engineering work; the teaching commitment is part-time and outside normal working hours.
- Languages
- English B2–C1, fluent communication.
- Notice period
- 2 weeks · not actively searching; would move for the right technical scope
- Gaps &
constraints - Has never worked with video devices or cameras; FPGA and Zynq experience does not establish video-processing experience.
- Not actively looking. May decline a move if the tasks are not sufficiently interesting; the technical scope matters more than the job title.
Salary expectations
Current compensation
Reason for the move
